Authors: Basu, Anupam
Leupers, Rainer
Marwedel, Peter
Title: Register-Constrained Address Computation in DSP Programs
Language (ISO): en
Abstract: This paper describes a new code optimization technique for digital signal processors (DSPs). One important characteristic of DSP algorithms are iterative accesses to data array elements within loops. DSPs support efficient address computations for such array accesses by means of dedicated address generation units (AGUs). We present a heuristic technique which, given an AGU with a fixed number of address registers, minimizes the number of instructions needed for array address computations in a program loop.
URI: http://hdl.handle.net/2003/2760
http://dx.doi.org/10.17877/DE290R-3198
Issue Date: 1998-07-02
Publisher: Universität Dortmund
Appears in Collections:Entwurfsautomatisierung für Eingebettete Systeme

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