Ein Speicher-Hierarchie Profiler mit Virtex-FPGAs und PowerPCs

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dc.contributor.authorCordes, Daniel
dc.contributor.authorFalarz, Arthur
dc.contributor.authorGattmann, Michael
dc.contributor.authorHanloh, Sebastian
dc.contributor.authorJung, Matthias
dc.contributor.authorKatriniok, Alexander
dc.contributor.authorKleinsorge, Jan
dc.contributor.authorMilewski, Alexander
dc.contributor.authorPucyk, Thomas
dc.contributor.authorRotthowe, Felix
dc.contributor.authorSchmoll, Florian
dc.contributor.authorWonneberger, Stefan
dc.date.accessioned2008-02-19T12:18:26Z
dc.date.available2008-02-19T12:18:26Z
dc.date.issued2008-02-19T12:18:26Z
dc.identifier.urihttp://hdl.handle.net/2003/25039
dc.identifier.urihttp://dx.doi.org/10.17877/DE290R-15818
dc.language.isodede
dc.subject.ddc004
dc.titleEin Speicher-Hierarchie Profiler mit Virtex-FPGAs und PowerPCsde
dc.typeTextde
dc.type.publicationtypeStudyThesisde
dcterms.accessRightsopen access

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