Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Ueter, Niklas | - |
dc.contributor.author | Günzel, Mario | - |
dc.contributor.author | Brüggen, Georg von der | - |
dc.contributor.author | Chen, Jian-Jia | - |
dc.date.accessioned | 2024-08-27T10:45:29Z | - |
dc.date.available | 2024-08-27T10:45:29Z | - |
dc.date.issued | 2023-05-25 | - |
dc.identifier.uri | http://hdl.handle.net/2003/42658 | - |
dc.identifier.uri | http://dx.doi.org/10.17877/DE290R-24494 | - |
dc.description.abstract | Increasing performance needs of modern cyber-physical systems leads to multiprocessor architectures being increasingly utilized. To efficiently exploit their potential parallelism in hard real-time systems, appropriate task models and scheduling algorithms that allow to provide timing guarantees are required. Such scheduling algorithms and the corresponding worst-case response time analyses usually suffer from resource over-provisioning due to pessimistic analyses based on worst-case assumptions. Hence, scheduling algorithms and analyses with high resource efficiency are required. A prominent fine-grained parallel task model is the directed-acyclic-graph (DAG) task model that is composed of precedence constrained subjobs. This paper studies the hierarchical real-time scheduling problem of sporadic arbitrary-deadline DAG tasks. We propose a parallel path progression scheduling property that is implemented with only two distinct subtask priorities, which allows to quantify the parallel execution of a user chosen collection of complete paths in the response time analysis. This novel approach significantly improves the state-of-the-art response time analyses for parallel DAG tasks for highly parallel DAG structures and can provably exhaust large core numbers. Two hierarchical scheduling algorithms are designed based on this property, extending the parallel path progression properties and improve the response time analysis for sporadic arbitrary-deadline DAG task sets. | en |
dc.language.iso | en | de |
dc.relation.ispartofseries | IEEE transactions on computers;72(10) | - |
dc.rights.uri | https://creativecommons.org/licenses/by/4.0/ | de |
dc.subject | Real-time DAG scheduling | en |
dc.subject | homogeneous multicore platforms | en |
dc.subject | hierarchical scheduling | en |
dc.subject | approximation algorithms | en |
dc.subject.ddc | 004 | - |
dc.title | Parallel path progression DAG scheduling | en |
dc.type | Text | de |
dc.type.publicationtype | Article | de |
dc.subject.rswk | Azyklischer gerichteter Graph | de |
dc.subject.rswk | Mehrkernprozessor | de |
dc.subject.rswk | Scheduling | de |
dc.subject.rswk | Approximationsalgorithmus | de |
dcterms.accessRights | open access | - |
eldorado.secondarypublication | true | de |
eldorado.secondarypublication.primaryidentifier | https://doi.org/10.1109/TC.2023.3280137 | de |
eldorado.secondarypublication.primarycitation | N. Ueter, M. Günzel, G. v. d. Brüggen and J. -J. Chen, "Parallel Path Progression DAG Scheduling," in IEEE Transactions on Computers, vol. 72, no. 10, pp. 3002-3016, Oct. 2023, doi: 10.1109/TC.2023.3280137. | en |
Appears in Collections: | Entwurfsautomatisierung für Eingebettete Systeme |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
Parallel_Path_Progression_DAG_Scheduling.pdf | DNB | 909.27 kB | Adobe PDF | View/Open |
This item is protected by original copyright |
This item is licensed under a Creative Commons License