Circuit Analysis and Design using Evolutionary Algorithms

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Date

2001-10-16

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Universität Dortmund

Abstract

This paper focuses on electronic design at circuit level. The use of evolutionary algorithms to this application is discussed and a trade off to existing approaches is investigated. The design and analyzing task at this level is described in detail. As example a 1-bit full adder design in static CMOS is inspected with regard to power consumption and delay. In algorithmic scope both, single- and multi-objective optimization are regarded here.

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