Characterization and Modeling of the Threshold Voltage Instability in p-Gate GaN HEMTs

Abstract

The p-gate GaN HEMT is a modern power semiconductor transistor capable of overcoming the switching speed limitation of conventional Silicon-based technologies. However, the GaN HEMT is a fairly new technology that still suffers undesired effects that affect its operation. Nowadays, the most prominent effects are the shift and instability of the threshold voltage Vth, caused by capacitive coupling into the gate stack as well as trapping, accumulation, and depletion of carriers. In this study, an experimental characterization of the Vth behavior is executed and subsequently used to develop a physically-based compact model. For this purpose, a custom setup is developed capable of high-resolution transient measurements for pulse lengths ranging from 100 ns up to 100 s. Utilizing the setup, commercially available state-of-the-art p-gate GaN HEMTs are investigated, showing a Vth shift and instability that appears relevant up to the nominal operation. The experimental results show that the drain-source voltage VDS yields a Vth shift, which, when applied for long durations (e.g., during off-state), leads to an additional Vth instability. The gate-source voltage VGS also yields significant Vth instabilities, which correlate with the VDS-induced effects. Furthermore, the driving conditions causing an impact on Vth appear to also correlate with the devices’ short-circuit capability and degradation. However, no available models cover the Vth behavior, which is necessary to predict their impact and reliability concerns. Consequently, a compact model is developed based on the surface potential for the drain path, extended by the conduction mechanisms covering the gate path. Finally, the Vth shift is modeled based on capacitive coupling into the gate, while for the Vth instabilities, a possible implementation is exemplified for the impact of VDS.