Novel Code Optimization Techniques for DSPs

dc.contributor.author	Leupers, Rainer	de
dc.date.accessioned	2004-12-06T12:57:17Z
dc.date.available	2004-12-06T12:57:17Z
dc.date.created	1998	de
dc.date.issued	1998-07-02	de
dc.description.abstract	Software development for DSPs is frequently a bottleneck in the system design process, due to the poor code quality delivered by many current C compilers. As a consequence, most of the DSP software still has to be written manually in assembly language. In order to overcome this problem, new DSP-specific code optimization techniques are required, which, in contrast to classical compiler technology, take the detailed processor architecture sufficiently into account. This paper describes several new DSP code optimization techniques: maximum utilization of parallel address generation units, exploitation of instruction-level parallelism through exact code compaction, and optimized code generation for IF-statements by means of conditional instructions. Experimental results indicate significant improvements in code quality as compared to existing compilers.	en
dc.format.extent	168198 bytes
dc.format.extent	194518 bytes
dc.format.mimetype	application/pdf
dc.format.mimetype	application/postscript
dc.identifier.uri	http://hdl.handle.net/2003/2765
dc.identifier.uri	http://dx.doi.org/10.17877/DE290R-5202
dc.language.iso	en	de
dc.publisher	Universität Dortmund	de
dc.subject.ddc	004	de
dc.title	Novel Code Optimization Techniques for DSPs	en
dc.type	Text	de
dc.type.publicationtype	conferenceObject
dcterms.accessRights	open access

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