Optimized commutation circuit for improved utilization of SiC
| dc.contributor.advisor | Pfost, Martin | |
| dc.contributor.author | Schlüter, Michael | |
| dc.contributor.referee | Lindemann, Andreas | |
| dc.date.accepted | 2023-12-08 | |
| dc.date.accessioned | 2024-09-25T11:04:12Z | |
| dc.date.available | 2024-09-25T11:04:12Z | |
| dc.date.issued | 2023 | |
| dc.description.abstract | Silicon carbide MOSFETs have increasingly been recognized as advantageous compared to conventional silicon IGBTs; however, they face significant challenges due to a high defect density in the raw material. To optimize semiconductor efficiency, it is critical to minimize both conduction and switching losses. Conduction losses are influenced by on-state resistance and device breakdown voltage, while switching losses are dependent on switching speed, which is constrained by turn-off voltage overshoot and system stray inductance. Therefore, the reduction of stray inductance is paramount for decreasing both types of losses. This work presents a comprehensive analysis of the current state of the art, outlining essential device characteristics and limitations. It identifies the distribution of stray inductance in the DC-link and power module as significant constraints. While DC-snubber circuits are discussed as a potential solution, their effectiveness decreases at higher currents due to increased damping losses. An active controlled snubber is introduced, and its operational principles in conjunction with a half-bridge configuration are described. This setup facilitates a substantial reduction in stray inductance during MOSFET and diode turn-off, resulting in negligible losses during turn-on. The analytical description of the operational mechanism reveals opportunities for zero-current switching of the auxiliary switch. The derived model is validated through empirical measurements and is employed to predict behavior in subsequent switching events. Comparative analysis with a similar DC-snubber configuration indicates that the active snubber exhibits alternating yet stable voltage behavior, with a maximum snubber voltage much lower as with a conventional DC-snubber. Three-phase inverters designed for switching frequencies of 10 kHz and 30 kHz demonstrate a potential increase in output power of 35% for non-optimized semiconductors and 59% for optimized MOSFETs. Furthermore, the introduced configuration is utilized to actively drive a small LC-filter, evaluating its applicability under constraints on maximum voltage slope. A dependency between snubber voltage and the timing of filter pulses has been identified. In comparison to a state-of-the-art IGBT setup with similar output power, a reduction in switching losses by a factor of 20 was observed, accompanied by a concurrently lower voltage slope. However, the time constants of the snubber circuit limit the minimization of the LC-filter. | en |
| dc.identifier.uri | http://hdl.handle.net/2003/42683 | |
| dc.identifier.uri | http://dx.doi.org/10.17877/DE290R-24518 | |
| dc.language.iso | en | de |
| dc.subject | SiC | de |
| dc.subject | MOSFET | de |
| dc.subject | Snubber | en |
| dc.subject | Active snubber | en |
| dc.subject | Resonant snubber | en |
| dc.subject | Soft switching | en |
| dc.subject | High efficiency | en |
| dc.subject.ddc | 620 | |
| dc.title | Optimized commutation circuit for improved utilization of SiC | en |
| dc.type | Text | de |
| dc.type.publicationtype | PhDThesis | de |
| dcterms.accessRights | open access | |
| eldorado.secondarypublication | false | de |