Memory-aware platform description and framework for source-level embedded MPSoC software optimization

dc.contributor.advisorMarwedel, Peter
dc.contributor.authorPyka, Robert
dc.contributor.refereeTeubner, Jens
dc.date.accepted2017-03-16
dc.date.accessioned2017-06-23T09:27:17Z
dc.date.available2017-06-23T09:27:17Z
dc.date.issued2017
dc.description.abstractDeveloping optimizing source-level transformations, consists of numerous non-trivial subtasks. Besides identifying actual optimization goals within a particular target-platform and compiler setup, the actual implementation is a tedious, error-prone and often recurring work. Providing appropriate support for this development work is a challenging task. Defining and implementing a well-suited target-platform description which can be used by a wide set of optimization techniques while being precise and easy to maintain is one dimension of this challenging task. Another dimension, which has also been tackled in this work, deals with provision of an infrastructure for optimization-step representation, interaction and data retention. Finally, an appropriate source-code representation has been integrated into this approach. These contributions are tightly related to each other, they have been bundled into the MACCv2 framework, a fullfledged optimization-technique implementation and integration approach. Together, they significantly alleviate the effort required for implementation of source-level memory-aware optimization techniques for Multi Processor Systems on a Chip (MPSoCs). The system-modeling approach presented in this dissertation has been located at the processor-memory-switch (PMS) abstraction level. It offers a novel combined structural and semantical description. It combines a locally-scoped, structural modeling approach, as preferred by system designers, and a fast, database-like interface, best suited for optimization technique developers. It supports model refinement and requires only limited effort for an initial abstract system model. The general structure consists of components and channels. Based on this structure, the system model provides mechanisms for database-like access to system-global target-platform properties, while requiring only definition of locally-scoped input data annotated to system-model items. A typical set of these properties contains energy-consumption and access-latency values. The request-based retrieval of system properties is a unique feature, which makes this approach superior to state-of-the-art table-lookup-based or full-system-simulation-based approaches. Combining such component-local properties to system-global target-platform data is performed via aspect handlers. These handlers define computational rules which are applied to correlated locally-scoped data along access paths in the memory-subsystem hierarchy. This approach is capable of calculating these system-global values at a rate similar to plain table lookups, while maintaining a precision close to full-system-simulation-based estimations. This has been shown for both, energy-consumption values as well as access-latency values of the MPARM platform. The MACCv2 framework provides a set of fundamental services to the optimization technique developer. On top of these services, a system model and source-code representation are provided. Further, framework-based optimization-technique implementations are encapsulated into self-contained entities exposing well-defined interfaces. This framework has been successfully used within the European Commission funded MNEMEE project. The hierarchical processing-step representation in MACCv2 allows for encapsulation of tasks at various granularity levels. For simplified reuse in future projects, the entire toolchain as well as individual optimization techniques have been represented as processing-step entities in terms of MACCv2. A common notion of target-platform structure and properties as well as inter-processing-step communication, is achieved via framework-provided services. The system-modeling approach and the framework show the right set of properties needed to support development of memory-aware optimization techniques. The MNEMEE project, continued research work, teaching activities and PhD theses have been successfully founded on approaches and the framework proposed in this dissertation.en
dc.identifier.urihttp://hdl.handle.net/2003/36003
dc.identifier.urihttp://dx.doi.org/10.17877/DE290R-18021
dc.language.isoende
dc.subjectMemory-awareen
dc.subjectPlatform descriptionen
dc.subjectFrameworken
dc.subjectMPSoCen
dc.subjectSoftware optimizationen
dc.subject.ddc004
dc.subject.rswkFramework <Informatik>de
dc.subject.rswkSystem-on-Chipde
dc.subject.rswkProgrammierung <Optimierung>de
dc.subject.rswkMehrkernprozessorde
dc.subject.rswkHauptspeicherde
dc.titleMemory-aware platform description and framework for source-level embedded MPSoC software optimizationen
dc.typeTextde
dc.type.publicationtypedoctoralThesisen
dcterms.accessRightsopen access

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